Intel Foundry Services (IFS) this week soft-launched their new Intel 16 process technology, a 16nm-class node that will be used for the production of low-power chips for everyday workloads. The updated legacy node, derived from Intel's existing 22FFL process tech, is aimed at cost-conscientious customers who are producing simpler chips that don't require the performance offered by cutting-edge process nodes. Set to compete against nodes such as TSMC's N12e, budget nodes like Intel 16 typically see wide use in a variety of fields, ranging from aerospace and defense to IoT and radios.
First revealed by Intel a couple of years back, the ramp-up of Intel 16 comes as IFS is in the process of expanding its foundry offerings in order to offer the full range of process nodes that chip designers have come to expect from a contract fab. While not at the forefront of fab discussion as cutting edge nodes are, trailing-edge and mature process nodes are still used to produce a vast number of chips year after year, often simple chips that need few upgrades and may end up in production for a decade or longer.
TSMC, for its part, earns around 25% of its revenue by making hundreds of millions of chips using 40 nm and larger nodes. For other foundries, the revenue share share of 40nm and similar process technologies is even higher: SMIC and UMC earn over 80% of their revenue on mature nodes. Those chips have very long lifecycles – to the point that TSMC has a tough time persuading its customers to start using 28nm – underscoring their importance in the overall chip ecosystem, and the need for IFS to offer some cheaper, less advanced nodes to court these chips and their designers.
IFS's Intel 16 node targets a wide variety of applications, including application processors, analog, consumer electronics radio frequency (such as Wi-Fi and Bluetooth), mmWave, storage, military, aerospace, and government-usage chips. This FinFET-based technology is designed to hit a sweet spot between performance and cost, offering considerable transistor density and high performance thanks to its use of FinFETs, while still costing far less than leading-edge nodes where EUV machines and multi-patterning quickly drive up costs. Intel says that its 16nm-clss technology requires fewer masks as well as relatively simple back-end design rules. In essence, we're looking at a cost-optimized amalgamation of Intel's 22nm and 14nm nodes, bringing 22FFL a bit more forward without employing some of the more expensive aspects of 14nm.
The bulk of this week's announcements, in turn, are focused on chip design for the new node. Leading electronic design automation (EDA) and IP providers — Ansys, Cadence, Siemense EDA, and Synopsys — are all announcing their backing of the Intel 16 process technology with their certified software flows and IP. For example, Cadence has ported a range of its IP blocks to Intel 16, including PCIe 5.0; 25G-KR Ethernet multi-protocol PHY; multi-protocol PHY for consumer applications that support standards like PCIe 3.0 and USB 3.2; multi-standard PHY for LPDDR5/4/4X memory; and MIPI D-PHY v1.2 for cameras and displays. Additionally, Synopsys also has its AI-enabled Synopsys.ai toolkit that now supports Intel 16.
With the necessary tooling now in place, chip designers can start using design, verification, and simulation tools to develop their chips on IFS's 16nm-class fabrication technology. At this point it remains unclear when Intel expects to start fabbing chips on the Intel 16 process, though as it's based on mature designs, it's likely more a matter of when the first customer chip designs will be ready.
Sources: Intel, Ansys, Cadence, Siemense EDA, and Synopsys.
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